• Continuous data rate selection up to 4 Gbps
  • True parallel bit-error-rate measurement across 8 lanes
  • Per lane TX amplitude and pre-emphasis control
  • Per lane RX clock recovery and equalization
  • TX jitter injection and integrated RX jitter testing
  • BERT, eye diagram and analog waveform measurement capabilities
  • Flexible loopback support
  • State-of-the-art programming environment based on the highly intuitive Python language
Popular solutions
PCIe Gen1, Clocks and Timers, ADC, PLL Jitter Transfer, DAC, JESD204B
Number of Lanes

8

Number of Signal/Data Analyzers

8

Maximum Per-Lane Data Rate

4 Gbps

Benefits

  • Continuous data rate selection up to 4 Gbps
  • True parallel bit-error-rate measurement across 8 lanes
  • Per lane TX amplitude and pre-emphasis control
  • Per lane RX clock recovery and equalization
  • TX jitter injection and integrated RX jitter testing
  • BERT, eye diagram and analog waveform measurement capabilities
  • Flexible loopback support
  • State-of-the-art programming environment based on the highly intuitive Python language

Features

The SV1C Personalized SerDes Tester is an ultra-portable, high-performance instrument that creates a new category of tool for high-speed digital product engineering teams. The SV1C fits in one hand and contains 8 independent stimulus generation ports, 8 independent capture and measurement ports and offers world-class signal-integrity features such as jitter injection and jitter measurement.

The SV1C has been designed specifically to address the growing need of a parallel, system-oriented test methodology to enable the test and measurement of complex SerDes interfaces such as PCI Express and MIPI M-PHY. Coupled with Introspect’s seamless, easy-to-use development environment, Pinetree, this tool enables product engineers with widely varying skill sets to efficiently work with and develop SerDes verification algorithms.

 

Request a quote

Questions? Visit our FAQ page or contact us for any inquiries.