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No, there is no mistake in the title of this blog. LPDDR5 and LPDDR5x are both still going strong, and there are many innovations happening in these domains today. For example, with the LPDDR5 LPCAMM2 standard starting to make its way into the market, we expect to see a lot of innovation in laptop, desktop, and server form factors. But, even as the current wave of LPDDR5 and LPDDR5x implementations start to hit high-volume manufacturing – especially within the LPCAMM2 form factor, researchers at leading semiconductor and memory companies are feverishly analyzing the needs for next generation technology and planning the best features that will be incorporated into the upcoming LPDDR6 specification. These researchers (and their companies) are doing this within the framework of the JEDEC Alliance, of which Introspect Technology is an active member, and they are creating the next generation low-power memory specification that will serve everything from mobile to AI applications.
So yes, this article is about LPDDR6 and the differences between it and the current LPDDR5 and LPDDR5x specifications. Introspect is thrilled to be an integral part of the LPDDR6 ecosystem, and we’re also working feverishly to be ready with test and measurement tools for this new standard. Our equipment is ready to enable memory makers, IP vendors, and CPU/GPU companies to design, validate, characterize, and test this new standard.
This is a given of course: LPDDR6 will be faster than LPDDR5. But we must list the higher speed as the first difference in LPDDR6 because of the implication it has on test and measurement equipment for memory interfaces and because this is an area where Introspect’s tools really shine! The reality is that many legacy test solutions for memory interfaces are somewhat lagging relative to the industry, and LPDDR6 will only exacerbate this problem. But there is no reason to worry, Introspect Technology is already ahead of the curve.
So, how fast will it be? According to the JEDEC press release, LPDDR6 will start at around 10.6 Gbps, and then it is expected to reach 14.4 Gbps and more. At Introspect Technology, our tools are already operating at speeds much higher than this! Reach out to us to get detailed specifications of our equipment and to learn how we are ready for LPDDR6.
The LPDDR5 DQ data bus width was 16 bits. LPDDR6 will introduce a 24-bit DQ bus width. While this is useful for mission-mode applications such as AI, it poses immense challenges for test and measurement. On the one hand, legacy BERTs on the market barely cover 1 or 2 DQ bits at a time, and on the other hand, memory ATE solutions are always challenged between the aspects of bus width and data rate.
Introspect Technology is ready for wide data bus width applications. Already, for other memory interfaces, we routinely test 70 or 80 bits of data using our M Series test systems, which are protocol-aware ATE-on-Bench solutions for DDR interfaces.
Getting more into the protocol itself, LPDDR6 introduces the concept of channels and sub-channels. Simply stated, this means that certain signals are shared between “sub-channels” making up a “channel”. In the old days, when running two LPDDR5 or LPDDR5x memory channels, every pin in the interface was duplicated, and this included the CK (clock) lines, CS lines, and other non-command pins. With the concept of sub-channels, LPDDR6 saves on pins – a single CK pair can be shared between two sub-channels. Similarly, non-command signals such as RESET can also be shared between sub-channels, and this is how the total pin count is reduced.
The concept of sub-channels is a welcome refinement to memory interface protocols. It does, however, introduce protocol testing challenges, and this is where Introspect’s tools can help!
Finally, LPDDR6 introduces a new burst length of 24 bits instead of 16 bits. Referring to Figure 1, we show a comparison between the two burst lengths for LPDDR5/LPDDR5x and LPDDR6.
As can be seen, each time data is being transmitted to or from the memory (also known as a “burst”), 24 different bits (d0, d1, …, d22, d23) of data are transmitted over each DQ pin. This is much higher than the 16 bits transmitted over LPDDR5. What’s more, not all of these bits are used for transmitting the real data stored in the memory device! Some of these bits are used for advanced topics that are beyond the scope of this article.
Whether you want to learn more about the DQ burst design in LPDDR6, or about our protocol-aware BERT solutions for LPDDR5, LPDDR5x, and LPDDR6, send us an email today.
Introspect Technology has developed a rich portfolio of test solutions for memory interfaces, including LPDDR5 and LPDDR6. The solutions are able to provide coverage for three different scenarios.
In this paradigm, the Introspect Technology protocol-aware BERT (or ATE on Bench) acts as a virtual memory controller. That is, it can autonomously train a memory interface for write/read operations. From that point onward, the Introspect solution provides BERT capabilities such as receiver stress testing, and it also provides ATE capabilities such as vector testing.
The Introspect Technology solution can perform receiver and transmitter testing, especially on the DQ bus of a memory interface. Additionally, it can perform command and address decoding, thus doubling as a full-fledged high-performance protocol analyzer.
The domain of IP and memory controller test is rapidly changing as we published recently.
Finally, engineers at memory makers or at CPU makers must make sure that their semiconductor devices work in real applications. For this reason, these engineers need to perform system-level tests. And of course, system integrators such as server OEMs or even data centers often need to debug memory errors. For these applications, Introspect Technology offers advanced probing and protocol analyzer solutions. Figure 3 shows an example of probing a live smartphone system running LPDDR5 memory in package-on-package (PoP) configuration.
LPDDR6 is coming, and Introspect is ready to help our customers develop for this new specification. Our commercially released test equipment already has all the hardware capability for LPDDR6, and this includes data rates, data bus widths, and more.
We look forward to helping you plan your LPDDR6 development, anytime at info@introspect.ca.
