• True parallel bit-error-rate measurement across 8 lanes
  • Continuous data rate selection up to 32 Gbps
  • Per lane TX amplitude and pre-emphasis control
  • Per lane RX clock recovery and equalization
  • Fully-synthesized integrated jitter injection on all lanes
  • BERT, eye diagram and analog waveform measurement capabilities
  • Flexible loopback support per lane
  • State-of-the-art programming environment based on the highly intuitive Python language
Number of Pattern Generators

8

Maximum Per-Lane Data Rate

32 Gbps

Number of Signal/Data Analyzers

8

BENEFITS

  • True parallel bit-error-rate measurement across 8 lanes
  • Continuous data rate selection up to 32 Gbps
  • Per lane TX amplitude and pre-emphasis control
  • Per lane RX clock recovery and equalization
  • Fully-synthesized integrated jitter injection on all lanes
  • BERT, eye diagram and analog waveform measurement capabilities
  • Flexible loopback support per lane
  • State-of-the-art programming environment based on the highly intuitive Python language

Features

The SV2C Personalized SerDes Tester is an ultra-portable, high-performance instrument that creates a new category of tool for testing high-speed digital products. It has been designed specifically to address the growing need of a parallel, system-oriented test methodology while offering world-class signal-integrity features such as jitter injection, de-emphasis generation, and equalization. Coupled with a highly versatile Introspect ESP software environment, the SV2C enables product-, validation- and production-test engineers to develop fast, efficient SerDes verification algorithms.

Questions? Visit our FAQ page or contact us for any inquiries.