As AI, HPC, and next-generation computing systems continue to evolve, memory interfaces such as DDR5, LPDDR5, GDDR, and future DDR6 are pushing validation and testing requirements to new levels of complexity. To address these challenges, Introspect Technology and Trust-Tek brought together memory experts, validation engineers, and industry innovators for an exclusive one-day technical seminar in Taiwan.
Attendees gained practical insights into emerging memory technologies, explored advanced validation methodologies, and engaged directly with industry experts through keynote presentations, live demonstrations, technical discussions, and networking opportunities.
Event Details
- Date: Friday, August 14, 2026
- Time: 09:30 – 16:00 CST
- Venue: Taipei Marriott Hotel
What You’ve Missed
- Strategic insights into emerging memory standards and next-generation technologies
- Practical memory validation methodologies adopted by leading engineering teams worldwide
- Live demonstrations of advanced memory test and measurement solutions
- Direct Engagement with memory and validation experts through networking
- Interactive discussions addressing real-world engineering challenges
Agenda
- 09:30-10:00 Registration, Coffee & Pastries
- 10:00-10:30 Opening Address, Trends in High-Speed Memory Interface Design
- 10:30-11:15 Advanced Signal Integrity Testing Using Introspect’s Integrated-Tip Interposers with Oscilloscopes
- 11:15-12:00 LPDDR5 Bus Monitoring with Introspect’s Protocol Analyzer
- 12:00-13:30 Complimentary Lunch
- 13:30-14:30 PHY-Level Validation and Characterization on a Live DUT
- 14:30-15:00 Tea Break
- 15:00-15:45 Introspect Technology Tools for High-Speed Interface Validation
- 15:45-16:00 Q&A Session
