Montréal, Canada, April 2, 2021 – Introspect Technology, leading manufacturer of test and measurement tools for high-speed digital applications, announced today the addition of advanced features for debugging and testing devices based on the JESD403-1 JEDEC Module Sideband Bus Standard (“SidebandBus”). SidebandBus is a standard that defines the protocols for system management on DDR5 memory modules and beyond. SidebandBus was developed in coordination with the MIPI® Alliance, of which Introspect Technology is a Contributor Member, and it provides a superset of the MIPI I3C BasicSM bus standard. Most notably, SidebandBus introduces a hub functionality that increases the number of supported devices on the bus without sacrificing the full throughput of the bus.
The Introspect SV4E-I3C Test and Debug Module has been on the market for several years already, and it represents a mature test and measurement implementation for MIPI I3CSM specifications including I3C v1.0, I3C v.1.1, and I3C Basic v1.0. And now with the latest software release, it adds complete support for JESD403-1 as well as the Serial Presence Detect Device Standard (JESD300-5) and others.
With the new JESD403-1 and JEDEC device support, the SV4E-I3C provides features for individually exercising devices focused on the DDR5 ecosystem such as PMIC, SPD Hub, and TS. It also provides features for controlling and analyzing a fully populated memory module such as an R-DIMM. For example, a single SV4E-I3C can instantiate multiple master and slave devices internally, thus providing an ideal self-contained solution for completely characterizing an SPD Hub. In this setup, a master instance from the SV4E-I3C can drive the SPD Hub as if the SV4E-I3C is a main SidebandBus Host Controller. Then, a slave instance on the SV4E-I3C can be connected to the other side of the hub and act as a PMIC or Thermal Sensor. Such end-to-end capability ensures complete design and fault coverage during all stages of product development: from early prototypes to system-level regression and high volume manufacturing.
For DIMM testing, the SV4E-I3C offers a highly intuitive SidebandBus Controller programming interface that can automatically initialize a bus, enumerate devices on the bus, and automatically discover capabilities of connected devices on the bus. This makes it ideal for regression testing, burn-in testing, or mass production testing of fully-populated DIMMs.
Key features of the SV4E-I3C I3C Test and Debug Module include:
- Operation using the Introspect ESP Software: award-winning integrated development environment for developing and automating tests
- Device roles: The SV4E-I3C can configure multiple devices with different roles (main master, secondary master, slave) concurrently
- Device instances: The SV4E-I3C integrates 4 parallel devices, each with its own independent protocol stack
- Timing resolution: nanosecond resolution on delay generation (exerciser) and time-stamp (analyzer) logic
- Protocol analysis: easily trigger on CCC’s and patterns for private and device to device communication, IBI, and hot-join
More information about the SV4E-I3C can be found at SV4E-I3C: MIPI I3C Test and Debug Module | Introspect Technology, and more information about the Introspect ESP Software can be found at Introspect ESP Software | Introspect Technology.
About Introspect Technology
Founded in 2012 through self-funding, Introspect Technology designs and manufactures innovative test and measurement equipment for high-speed digital applications. Whether it is the next smartphone or the level-4 autonomy engine in a mobility solution, our award-winning tools are used to develop, test, and manufacture next-generation products. In short, we help the leading global technology companies make tomorrow’s technology today’s possibility.