Personalized SerDes Testers
What is a USB Instrument?
How does it connect to my application board?
The following image illustrates a real-life application in which the SV1C is connected to a 7-lane FPGA system. As can be seen, the SV1C is much smaller than the board being tested, and in addition to the high-speed interfaces, it contains reference clock inputs and outputs for synchronization.
Connection to the unit under test happens through high-performance cable assemblies from Huber+Suhner.
How many ports does the SV1C have?
The SV1C is a truly integrated instrument. The following is a list of all available DUT interface ports. All of these are on-the-fly programmable through the USB connection to the PC-operated Introspect ESP Software.
High-Speed Transmitters: 8
High-Speed Receivers: 8
Reference Clock Input: 1
Reference Clock Output: 2
Auxiliary Transmitter/Receiver Pair: 1
Auxiliary Expansion Bus: 1 (includes triggers, flags, single-ended I/O, differential I/O)
Auxiliary Power Supply: 1
How about user-defined patterns and pattern sequencers?
The SV1C contains deep pattern memory that is programmable on an individual basis with respect to lanes and with respect to receivers and transmitters. That is, each transmitter and each receiver can have its own pattern definition.
Like user patterns, each transmitter and each receiver can be driven by a pattern sequencer program. And, the instrument can store/cache multiple sequencer programs at any given time.
Can SV1C be programmed to loop back data that it receives?
Yes, this is possible across any number of lanes (depending on user selection). The loopback capability of the SV1C is truly flexible and includes:
– Retiming of data for the purpose of decoupling DUT receiver performance from DUT transmitter performance
– Latency alignment during loopback
– Arbitrary jitter or skew injection on loopback data
The following block diagrams show two common loopback configurations that can be used with the SV1C. In the first configuration, a single DUT’s transmitter and receiver channels are connected together through the SV1C. In the second configuration, arbitrary pattern testing can be performed on an end-to-end communications link. The SV1C is used to pass data through from a traffic generator (such as an end-point on a real system board) to the DUT while stressing the DUT receiver with jitter or skew.
Can SV1C receive an external reference clock for synchronization with other tools?
Can SV1C receive or generate a reference clock that is not an integer ratio of the high-speed data?
Can I transmit data at 100 ppm frequency offset from my receiver to stress it?
Does the SV1C contain clock recovery?
Can I use the SV1C to test a serializer component or subsystem?
Can I use the SV1C to test a de-serializer component or subsystem?
Can I use the SV1C to test the transfer function of my PLL?
Can SV1C be used to test 100Gbps CFPs?
Introspect ESP Software
What version of Python does Introspect currently support?
Can Introspect's software be called from the command-line?
Can I call external Python modules from within ESP Software?
Can I export measurement results?
What is PlotCreator?
PlotCreator is Introspect’s custom scientific graph and visualization tool. In addition to the typical default signal integrity viewers that come with the tool, PlotCreator allows you to visualize any kind of scientific analysis that you may have completed in the software. Like other components in Introspect ESP Software, this feature is so intuitive to use. Taking an example, typing in the following code
t = arange(-100,100,0.1)
would automatically generate the image shown here:
What is a shmoo?
What production-floor features does Introspect ESP Software offer?
The software has been developed with production testing in mind, and it includes various features that cater to both the operator and the test engineer. For the test engineer, the software allows full access and debug capability, so the engineer can achieve his/her test program development with ease. It also includes a complete suite of report-generation features, whether in HTML format or in other formats.
Once the test engineer is finished with development, the test program can automatically and instantaneously be “hardened” for operator use. Features such as “Test As Component” and “Data Record” enable this mode without requiring any additional code to be written.
Please refer to the Documentation section of this web site or contact us using the form below for further information.
Can Introspect ESP Software be used to control external equipment through GP-IB?
Can I operate Introspect ESP Software remotely?
Introspect ESP Embedded
Can I use Introspect ESP on FPGA systems?
Yes, a primary target for Introspect ESP Embedded is FPGA systems. It is readily available on 28 nm FPGAs from Altera, and it can also be instantiated on other FPGA vendor parts as well.
Please refer to the Documentation section of this web page for more details, or contact us using the form at the bottom of this page!
Can I build my own tester by combining Introspect ESP with Software?
Does ESP require modifications to the SerDes Hard IP in the FPGA?
No, the Introspect ESP Embedded product does not require changes to the hard-IP inside your FPGA. It uses the receiver front-end circuitry in the FPGA in order to perform “signal digitization” right at the receiver front-end. Once signal digitization has happened, the Introspect ESP Embedded IP engages its sophisticated mixed-signal and DSP-based algorithms in order to provide complete and uncompromised signal integrity analysis results.
The Introspect ESP product is based on more than 15 years of research and development in the area of Test and Measurement, and it deploys technologies and techniques that are commercially available on multiple generations of equipment.
What jitter measurement algorithm does Introspect ESP use?
There are two kinds of jitter measurement methods that are available in Introspect ESP. Both are available natively in the product, and the selection of which method to use is completely up to you. All you have to do is call the correct component in the ESP Software.
The first method is based on the dual-dirac model as described in the following.
The second method is based on jitter separation as described in the following.
What is the best way for me to evaluate the Introspect ESP Embedded product?
Does Introspect ESP Embedded support jitter injection?
Does Introspect ESP perform automatic eye-mask testing?
Yes, the tool contains a sophisticated eye-mask test capability. First, there is the definition of the eye mask itself: you can define it as a polygon with an unlimited number of vertices. Then, there is the ability of the tool to automatically detect the eye center and automatically detect errors within the mask. To do this, Introspect ESP deploys advanced multi-dimensional numerical methods that borrow from the scientific field of optimization.
Like many other toolsets within Introspect ESP, the eye mask feature is a delight to use and is so intuitive. This affords you the most flexibility in terms of defining a pass/fail criterion for your links, but it also offers room for creativity. Over the years, we have seen some very interesting eye masks, and our favorite so far has been the following:
How accurate is ESP Embedded?
What it is it?
It is an intelligent, protocol-aware signal-integrity test instrument that can reside directly on your application board. We believe in enabling our customers to be as innovative as they can be in creating measurement paradigms that improve their own productivity.
Controlling where the test instrument resides allows you great flexibility in defining and architecting your instrumentation solutions.
Can I use it for production testing?
Yes, a prime application for direct-attach endpoints is production testing. For guaranteeing production quality, you need a true bit-error-rate tester grade capability in order to ensure error-free communication. The endpoint allows you to perform this test with ease, and it also offers debug and failure analysis capability in case you do catch that defective part.
The following is an image of a production load board on a zero-footprint tester:
What signal integrity features does the SV1D endpoint support?
The SV1D contains all the signal integrity features that you expect from a high-end instrument, but in a form factor that fits on an application board. In short, the SV1D can perform eye diagram measurement, jitter measurement, analog waveform capture, jitter injection, and more. In order to get these measurements, you can control the device using SPI, or you can connect it to Introspect ESP Software. When connected to software, the following are the kinds of results that you can visualize on your PC.
How do I design the SV1D onto my application board?
The SV1D is a mezzanine card that has two small-footprint connectors that mate to sockets on your carrier board. As such, your carrier board simply needs to have the landing pattern required by the two SV1D connectors in addition to two mounting holes. All power, ground, control, and high-speed interface signals are routed through these simple connector footprints. The following image shows an actual carrier board with the SV1D footprint features.
How many power supplies are required to operate the SV1D?
The SV1D requires a single 12-V DC power supply. We have designed it this way so that you do not have to worry about power supply sequencing or the design of complicated power-on logic.
Is there a carrier board reference design that I can download?
Yes, the reference design will soon be available in the Documentation section of this web site.