- Any rate programming
- Arbitrary pattern generation (including PRBS and clock patterns)
- BERT, eye diagram and analog waveform measurement capabilities
- Fully-synthesized integrated jitter injection and noise injection on all lanes
- Fully-automated integrated jitter testing on all lanes
- Per lane TX amplitude, pre-emphasis, and fine skew control
- Per lane RX clock recovery and equalization
- Flexible loopback support
- State-of-the-art programming environment based on the highly intuitive Python language
16
16
12.5 Gbps
BENEFITS
- Any rate programming
- Arbitrary pattern generation (including PRBS and clock patterns)
- BERT, eye diagram and analog waveform measurement capabilities
- Fully-synthesized integrated jitter injection and noise injection on all lanes
- Fully-automated integrated jitter testing on all lanes
- Per lane TX amplitude, pre-emphasis, and fine skew control
- Per lane RX clock recovery and equalization
- Flexible loopback support
- State-of-the-art programming environment based on the highly intuitive Python language