SV2C Personalized SerDes Tester

Parallel High-Speed SerDes Verification
That fits in your Hand

  • Measure eye diagrams, bathtub plots and BER
  • True parallel bit-error-rate measurement across 8 lanes
  • Fully-synthesized integrated jitter injection on all lanes
  • Flexible loopback support per lane
  • Hardware clock recovery per lane

The SV2C Personalized SerDes Tester is an ultra-portable, high-performance instrument that creates a new category of tool for testing high-speed digital products. The SV2C integrates multiple technologies to enable self-contained test and measurement of SerDes up to 28 Gbps. Coupled with a seamless, easy-to-use development environment, the SV2C enables product-, validation- and production-test engineers to develop fast, efficient SerDes verification algorithms. The SV2C fits in one hand and contains eight independent stimulus generation ports, eight independent error detectors and various clocking, synchronization and lane-expansion capabilities. It has been designed specifically to address the growing need of a parallel, system-oriented test methodology while offering world-class signal-integrity features such as jitter injection, de-emphasis generation, and equalization.

With a small form factor, an extensive feature set, and an exceptionally powerful software development environment, the SV2C is not only suitable for receiver signal-integrity verification engineers that perform traditional characterization tasks, but it is also ideal for FPGA developers and software developers who need rapid turnaround signal verification tools or hardware-software interoperability confirmation tools.