The World's First D-PHY 1.2/2.0 Analyzer

SV3C-DPRX D-PHY Analyzer

The SV3C-DPRX D-PHY Analyzer is an ultra-portable, high-performance instrument that enables exercising and validating MIPI D-PHY transmitter ports. Capable of analyzing any traffic and being completely data-rate agile, the D-PHY Analyzer includes complete hardware LP and HS receivers, dynamic termination, and offers sophisticated capture and compare modes.

The D-PHY Analyzer operates using the highly versatile Introspect ESP software environment, allowing for automating transmitter tests such as BER or protocol timings.

Key Benefits

  • Any-rate operation
  • Complete D-PHY receiver
  • Burst-mode and continuous mode analysis
  • Raw data capture as well as complete packet decode
  • CSI-2 video frame extraction
  • State of the art programming environment based on the highly intuitive Python language
  • De-serialized parallel output (for FPGA prototyping)
  • Reconfigurable, protocol customization (on request)

Key Features

Analyzer Block Diagrams

As can be seen, the Analyzer is a complete integrated 4-lane receiver which contains the analog front-end circuitry for D-PHY as well as a complete protocol back-end. Specifically, referring to Figure 2, the SV3C DPRX front-end contains LP threshold voltage detectors, dynamically controlled D-PHY termination resistors, and fully differential HS receivers.

PHY-Level Burst-Mode Raw Data Capture

To enable the deepest insight into all events in the transmitter under test, the SV3C DPRX is capable of performing deep raw captures on each lane individually. These captures are performed using an immediate capture command and are completely independent of any underlying protocol parameters. Referring to Figure 3, the Analyzer captures data as soon as it is commanded and fills up its entire memory buffer size specified by the user, potentially capturing multiple packets and multiple frames. The benefit of the immediate capture mode is that it allows for pattern learning or for detecting multiple non-deterministic / non-repetitive packets.

For a more focused view of D-PHY global timing parameters, the SV3C DPRX offers a triggered packet capture operation. In this mode, the D-PHY Analyzer sets the termination resistors into automatic mode. Then, the analyzer waits for a valid LP to HS entry sequence before enabling a capture. If no valid HS-entry transition is detected, the capture returns an empty array. However, when a valid HS-entry transition is detected, the capture starts immediately.

Completion of the capture happens at the earliest of two events: the appearance of the EOT sequence, or saturation of the capture memory buffer. For most packet sizes, the former condition (appearance of EOT) is what is observed. As such, the D-PHY analyzer produces a single record with a single SOT word and a single packet (burst) transmission.

Packet Analysis and Lane Merging

Through a software toggle, the SV3C DPRX performs autonomous packet analysis on received data, and it allows for identification (and isolation) of individual packets within a transmission. For example, it can enumerate short packets and long ones, and it provides sophisticated utilities for validating header information, ECC information, and Checksum values. Figure 5 shows two output formats out of the SV3C DPRX. In one, a complete listing of packets and packet analyses is provided in exportable formats; and in the other, Python return variables are offered for customizable packet analyses. For example, tools for detecting user-defined protocol commands can easily be constructed using the dynamic Python variables.

Packet Analyzer

HS Termination Control

On power-up, the D-PHY Analyzer operates in automatic HS termination mode. In this mode, the termination is enabled for HS transmissions (after valid entry into HS) and disabled for LP transmissions. Detection of the LP transitions is based on the programmable threshold level “lpThresholdVoltage”.

The termination can be forced enabled using the Immediate capture mode. Generally, termination can be switched between Auto mode and HS Only mode.

Packet Analyzer

CSI-2 Video Frame Construction and Advanced BER Testing

Big-picture analysis is provided by the SV3C DPRX through additional CSI-2 image handling utilities. Referring to Figure 6, received frames are displayed in software (or saved for data logging). Most significantly, the SV3C DPRX attempts to display all video frames even if packets are improperly constructed or contain a lot of bit errors. This provides the ability to correlate low-level (or physical layer) BER failures with high level protocol behavior.